1. Field of the Invention
The present invention relates to a semiconductor chip package manufacturing method and a structure thereof. More particularly, the present invention relates to a method of manufacturing a package structure without bumps applicable for an image sensor element and a structure thereof.
2. Description of the Related Art
FIG. 1A shows a semiconductor chip packaging method disclosed in U.S. Pat. No. 6,040,235. According to the technology of the patent, an active surface of a wafer 110 is covered by an insulating material 120, such as glass, which extends from contacts of the active surface of the wafer to a back surface of the wafer. The wafer is sawn into a plurality of chips, and the contact of each chip is extended to the surface of the package through a metal wire 130. However, if there is an excessive amount of defective chips in each wafer, for example, half of the chips are defective in a wafer, this type of packaging method cannot achieve an excellent effect.
Additionally, FIG. 1B shows a semiconductor chip packaging method disclosed in U.S. Pat. No. 6,271,469. In the patent, a colloid 140 serves as a base for supporting a chip 150, then an insulation layer 160 is formed, and a metal wire 170 is formed on the insulation layer. A package structure without bumps can be formed by this process. However, since hollowed-out openings cannot be formed on the surface of the semiconductor chip, this manufacturing method and structure are not applicable for packing the semiconductor chips that must have air contact an active surface in order to function, such as an image sensor element or a temperature- and humidity-sensing element, and thereby, the application field is limited.
Therefore, it is necessary to provide a semiconductor chip package manufacturing method and a structure thereof to solve the above problems.